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authorLu Baolu <baolu.lu@linux.intel.com>2018-03-16 12:31:36 +0800
committerJoerg Roedel <jroedel@suse.de>2018-03-20 13:43:27 -0500
commit971401015d14dfbb483aa6385f8bddc1afad0c32 (patch)
tree4d22aeb82c9ffb239c9c3b61325fa50531e6d2b6 /arch/arm/mach-axxia
parentbbe4b3af9d9e3172fb9aa1f8dcdfaedcb381fc64 (diff)
iommu/vt-d: Use real PASID for flush in caching mode
If caching mode is supported, the hardware will cache none-present or erroneous translation entries. Hence, software should explicitly invalidate the PASID cache after a PASID table entry becomes present. We should issue such invalidation with the PASID value that we have changed. PASID 0 is not reserved for this case. Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Kevin Tian <kevin.tian@intel.com> Cc: Sankaran Rajesh <rajesh.sankaran@intel.com> Suggested-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Liu Yi L <yi.l.liu@intel.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'arch/arm/mach-axxia')
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