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authorRoger Quadros <rogerq@ti.com>2017-04-21 16:15:38 +0300
committerDavid S. Miller <davem@davemloft.net>2017-04-24 12:40:24 -0400
commit69226896ad636b94f6d2e55d75ff21a29c4de83b (patch)
treef5df9ce46570ffe61c581a9feb68471c9a86cdee /arch/arm/include/asm/cacheflush.h
parent15769ff8b6d560a358761598aad5fc413ce2251b (diff)
mdio_bus: Issue GPIO RESET to PHYs.
Some boards [1] leave the PHYs at an invalid state during system power-up or reset thus causing unreliability issues with the PHY which manifests as PHY not being detected or link not functional. To fix this, these PHYs need to be RESET via a GPIO connected to the PHY's RESET pin. Some boards have a single GPIO controlling the PHY RESET pin of all PHYs on the bus whereas some others have separate GPIOs controlling individual PHY RESETs. In both cases, the RESET de-assertion cannot be done in the PHY driver as the PHY will not probe till its reset is de-asserted. So do the RESET de-assertion in the MDIO bus driver. [1] - am572x-idk, am571x-idk, a437x-idk Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/arm/include/asm/cacheflush.h')
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