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authorChen-Yu Tsai <wens@csie.org>2018-12-17 12:04:48 +0800
committerChen-Yu Tsai <wens@csie.org>2018-12-19 17:26:14 +0800
commitafdd273e269ca8dee3c70c150d96b4de4f83d39e (patch)
tree46c34d9d48a30644b31039c3caaae31b55d4952a /arch/arm/boot
parentb7b69fb840f50d7037b3ab0fd95a3a89086c8fad (diff)
ARM: dts: sunxi: Enable Broadcom-based Bluetooth for multiple boards
This patch adds the Bluetooth node, and the underlying UART node if it's missing, to the board device tree file for several boards. The LPO clock is also added to the WiFi side's power sequencing node if it's missing, to correctly represent the shared connections. There is also a PCM connection for Bluetooth, but this is not covered in this patch. These boards all have a WiFi+BT module from AMPAK, which contains one or two Broadcom chips, depending on the model. The older AP6210 contains two, while the newer AP6212 and AP6330 contain just one, as they use two-in-one combo chips. The Bluetooth side of the module is always connected to a UART on the same pingroup as the SDIO pins for the WiFi side, in a 4 wire configuration. Power to the VBAT and VDDIO pins are provided either by the PMIC, using one or several of its regulator outputs, or other fixed regulators on the board. The VBAT and VDDIO pins are shared with the WiFi side, which would correspond to vmmc-supply and vqmmc-supply in the mmc host node. A clock output from the SoC or the external X-Powers RTC provides the LPO low power clock at 32.768 kHz. All the boards covered in this patch are ones that do not require extra changes to the SoC's dtsi file. For the remaining boards that I have worked on, properties or device nodes for the LPO clock's source are missing. For the Cubietruck, the LPO clock is fed from CLK_OUT_A, which needs to be muxed on pin PI12. This can be represented in multiple ways. This patch puts the pinctrl property in the pin controller node. This is due to limitations in Linux, where pinmux settings, even the same one, can not be shared by multiple devices. Thus we cannot put it in both the WiFi and Bluetooth device nodes. Putting it the CCU node is another option, but Linux's CCU driver does not handle pinctrl. Also the pin controller is guaranteed to be initialized after the CCU, when clocks are available. And any other devices that use muxed pins are guaranteed to be initialized after the pin controller. Thus having the CLK_OUT_A pinmux reference be in the pin controller node is a good choice without having to deal with implementation issues. Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/sun7i-a20-cubietruck.dts25
-rw-r--r--arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts18
-rw-r--r--arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts18
-rw-r--r--arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts14
4 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 15c5eae4ca7b..99f531b8d2a7 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -99,6 +99,8 @@
mmc3_pwrseq: mmc3_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 7 9 GPIO_ACTIVE_LOW>; /* PH9 WIFI_EN */
+ clocks = <&ccu CLK_OUT_A>;
+ clock-names = "ext_clock";
};
sound {
@@ -227,6 +229,12 @@
status = "okay";
};
+&pio {
+ /* Pin outputs low power clock for WiFi and BT */
+ pinctrl-0 = <&clk_out_a_pin>;
+ pinctrl-names = "default";
+};
+
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pin>, <&pwm1_pin>;
@@ -298,6 +306,23 @@
status = "okay";
};
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pi_pins>, <&uart2_cts_rts_pi_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm20702a1";
+ clocks = <&ccu CLK_OUT_A>;
+ clock-names = "lpo";
+ device-wakeup-gpios = <&pio 7 24 GPIO_ACTIVE_LOW>; /* PH24 */
+ host-wakeup-gpios = <&pio 7 25 GPIO_ACTIVE_LOW>; /* PH25 */
+ shutdown-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH18 */
+ max-speed = <1500000>;
+ };
+};
+
&usb_otg {
dr_mode = "otg";
status = "okay";
diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index 742d2946b08b..c21320c4f4c2 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -363,6 +363,24 @@
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&ac100_rtc 1>;
+ clock-names = "lpo";
+ vbat-supply = <&reg_dldo1>;
+ vddio-supply = <&reg_dldo1>;
+ device-wakeup-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+ host-wakeup-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+ };
+};
+
&usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
diff --git a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
index e5f0645e53a7..a5a9f5a0603e 100644
--- a/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-cubietruck-plus.dts
@@ -394,6 +394,24 @@
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm4330-bt";
+ clocks = <&ac100_rtc 1>;
+ clock-names = "lpo";
+ vbat-supply = <&reg_dcdc1>;
+ vddio-supply = <&reg_sw>;
+ device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ host-wakeup-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+ shutdown-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+ };
+};
+
&usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
usb2_vbus-supply = <&reg_usb2_vbus>;
diff --git a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
index 83d32a1a2a63..e1c75f7fa3ca 100644
--- a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
+++ b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
@@ -91,6 +91,8 @@
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
};
};
@@ -276,7 +278,19 @@
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pg_pins>;
+ uart-has-rtscts;
status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ clocks = <&rtc 1>;
+ clock-names = "lpo";
+ vbat-supply = <&reg_dldo1>;
+ vddio-supply = <&reg_aldo3>;
+ device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ host-wakeup-gpios = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
+ shutdown-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+ };
};
&usb_otg {