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authorNeil Armstrong <narmstrong@baylibre.com>2018-11-06 11:54:35 +0100
committerNeil Armstrong <narmstrong@baylibre.com>2018-11-27 16:39:49 +0100
commitff217bc710e09360187ab5dd7d704f871c29e006 (patch)
tree6979baf6b5edd50e44e5620be6fb415fe8d89b6f /LICENSES
parent5d0bfe448481c9c109f5052c4ad36ef855aedc4f (diff)
drm/meson: Add support for VIC alternate timings
This change is an attempt to handle the alternate clock for the CEA mode. 60Hz vs. 59.94Hz, 30Hz vs 29.97Hz or 24Hz vs 23.97Hz on the Amlogic Meson SoC DRM Driver pixel clock generation. The actual clock generation will be moved to the Common Clock framework once all the video clock are handled by the Amlogic Meson SoC clock driver, then these alternate timings will be handled in the same time in a cleaner fashion. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Maxime Jourdan <mjourdan@baylibre.com> [narmstrong: fix maybe-uninitialized warnings after applying] Link: https://patchwork.freedesktop.org/patch/msgid/1541501675-3928-1-git-send-email-narmstrong@baylibre.com
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