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authorChris Packham <chris.packham@alliedtelesis.co.nz>2017-02-16 21:50:40 +1300
committerGregory CLEMENT <gregory.clement@free-electrons.com>2017-03-08 09:52:54 +0100
commitb4bcfccb2cecb9df1fc8860288e6356ef5c1c2f3 (patch)
tree0d35d033030c66085fdb5b597efe6b14ee4c31a2 /Documentation
parent43e28ba877089a53b76b029fe8f0facc9d2b56f4 (diff)
ARM: dts: mvebu: Move mv98dx3236 clock bindings
Previously the coreclk binding for the 98dx3236 SoC was inherited from the armada-370/xp. This block is present in as much as it is possible to read from the register location without causing any harm. However the actual sampled at reset values are reflected in the DFX block. Moving the binding to the DFX block enables support for different clock strapping options in hardware. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/mvebu-core-clock.txt7
-rw-r--r--Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt11
2 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
index eb985a633d59..796c260c183d 100644
--- a/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
+++ b/Documentation/devicetree/bindings/clock/mvebu-core-clock.txt
@@ -31,6 +31,12 @@ The following is a list of provided IDs and clock names on Armada 39x:
4 = dclk (SDRAM Interface Clock)
5 = refclk (Reference Clock)
+The following is a list of provided IDs and clock names on 98dx3236:
+ 0 = tclk (Internal Bus clock)
+ 1 = cpuclk (CPU clock)
+ 2 = ddrclk (DDR clock)
+ 3 = mpll (MPLL Clock)
+
The following is a list of provided IDs and clock names on Kirkwood and Dove:
0 = tclk (Internal Bus clock)
1 = cpuclk (CPU0 clock)
@@ -49,6 +55,7 @@ Required properties:
"marvell,armada-380-core-clock" - For Armada 380/385 SoC core clocks
"marvell,armada-390-core-clock" - For Armada 39x SoC core clocks
"marvell,armada-xp-core-clock" - For Armada XP SoC core clocks
+ "marvell,mv98dx3236-core-clock" - For 98dx3236 family SoC core clocks
"marvell,dove-core-clock" - for Dove SoC core clocks
"marvell,kirkwood-core-clock" - for Kirkwood SoC (except mv88f6180)
"marvell,mv88f6180-core-clock" - for Kirkwood MV88f6180 SoC
diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
index 5142efc8099d..de562da2ae77 100644
--- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
+++ b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
@@ -119,6 +119,16 @@ ID Clock Peripheral
29 sata1lnk
30 sata1 SATA Host 1
+The following is a list of provided IDs for 98dx3236:
+ID Clock Peripheral
+-----------------------------------
+3 ge1 Gigabit Ethernet 1
+4 ge0 Gigabit Ethernet 0
+5 pex0 PCIe Cntrl 0
+17 sdio SDHCI Host
+18 usb0 USB Host 0
+22 xor0 XOR DMA 0
+
The following is a list of provided IDs for Dove:
ID Clock Peripheral
-----------------------------------
@@ -169,6 +179,7 @@ Required properties:
"marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
"marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
"marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
+ "marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
"marvell,dove-gating-clock" - for Dove SoC clock gating
"marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
- reg : shall be the register address of the Clock Gating Control register