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authorChristoph Niedermaier <cniedermaier@dh-electronics.de>2018-11-05 09:48:34 +0100
committerJonathan Corbet <corbet@lwn.net>2018-11-06 07:36:18 -0700
commitd2f112a5681078aa2150f218074f76617fea4d74 (patch)
tree3df1cfe1b211827eb77446a0f9b7e9673b26c554 /Documentation/fpga
parent651022382c7f8da46cb4872a545ee1da6d097d2a (diff)
Docs/EDID: Fixed erroneous bits of XOFFSET, XPULSE, YOFFSET and YPULSE
The problem was found when EDID data sets for displays other than the provided samples were generated. The patch has no effect on the provided samples that still match the data used in drivers/gpu/drm/drm_edid_load.c. The provided samples use small values for XOFFSET, XPULSE, YOFFSET and YPULSE, where the error doesn't occur. This fix corrects the use of that values in case of high values, because the most significant bits were treated incorrectly. So in edid.S msbs4 should use bit 8 and 9 of XOFFSET and XPULS. For YOFFSET and YPULSE msbs4 should use bit 4 and 5. lsbs2 was introduced for a better overview, without functional change. Removing also the useless value 63 of all files, because it is added in the *.S description files and then it is subtracted in edid.S. Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de> Reviewed-by: Carsten Emde <C.Emde@osadl.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
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