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authorMacpaul Lin <macpaul.lin@mediatek.com>2020-02-21 17:52:19 +0800
committerStephen Boyd <sboyd@kernel.org>2020-05-28 21:22:31 -0700
commit626b134b58eb03c152cdba0a94c74ca3da0805e7 (patch)
tree03cb731cac729a700b6c1619c539a4db290eea14 /Documentation/devicetree
parent7b9e111a5216640c86c206e6b419a0f4908c202b (diff)
dt-bindings: clock: mediatek: document clk bindings mipi0a for Mediatek MT6765 SoC
This patch adds the binding documentation for mipi0a. Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: Owen Chen <owen.chen@mediatek.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Link: https://lore.kernel.org/r/1582278742-1626-3-git-send-email-macpaul.lin@mediatek.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mipi0a.txt
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+Mediatek mipi0a (mipi_rx_ana_csi0a) controller
+============================
+
+The Mediatek mipi0a controller provides various clocks
+to the system.
+
+Required Properties:
+
+- compatible: Should be one of:
+ - "mediatek,mt6765-mipi0a", "syscon"
+- #clock-cells: Must be 1
+
+The mipi0a controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+The mipi0a controller also uses the common power domain from
+Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
+The available power doamins are defined in dt-bindings/power/mt*-power.h.
+
+Example:
+
+mipi0a: clock-controller@11c10000 {
+ compatible = "mediatek,mt6765-mipi0a", "syscon";
+ reg = <0 0x11c10000 0 0x1000>;
+ power-domains = <&scpsys MT6765_POWER_DOMAIN_CAM>;
+ #clock-cells = <1>;
+};