diff options
| author | Bich HEMON <bich.hemon@st.com> | 2019-03-06 15:11:51 +0000 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2019-03-24 23:12:32 +0100 |
| commit | 472ec0ce3ef4111c1b55e6f677599cef4b52eed1 (patch) | |
| tree | eaa05f011d1d24cdf03c18d69d66a530df030dec /Documentation/devicetree/bindings/i2c | |
| parent | 9d3ca54b550ca070d3e3ed0c137ed1655fcf2772 (diff) | |
dt-bindings: i2c: stm32: remove extra spaces
Remove extra spaces before colons.
Signed-off-by: Bich Hemon <bich.hemon@st.com>
Reviewed-by: Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation/devicetree/bindings/i2c')
| -rw-r--r-- | Documentation/devicetree/bindings/i2c/i2c-stm32.txt | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt index 69240e189b01..7d054f1a5b2b 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt @@ -1,11 +1,11 @@ * I2C controller embedded in STMicroelectronics STM32 I2C platform -Required properties : -- compatible : Must be one of the following +Required properties: +- compatible: Must be one of the following - "st,stm32f4-i2c" - "st,stm32f7-i2c" -- reg : Offset and length of the register set for the device -- interrupts : Must contain the interrupt id for I2C event and then the +- reg: Offset and length of the register set for the device +- interrupts: Must contain the interrupt id for I2C event and then the interrupt id for I2C error. - resets: Must contain the phandle to the reset controller. - clocks: Must contain the input clock of the I2C instance. @@ -14,25 +14,25 @@ Required properties : - #address-cells = <1>; - #size-cells = <0>; -Optional properties : -- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified, +Optional properties: +- clock-frequency: Desired I2C bus clock frequency in Hz. If not specified, the default 100 kHz frequency will be used. For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values are 100000 and 400000. For STM32F7 SoC, Standard-mode, Fast-mode and Fast-mode Plus are supported, possible values are 100000, 400000 and 1000000. -- i2c-scl-rising-time-ns : Only for STM32F7, I2C SCL Rising time for the board +- i2c-scl-rising-time-ns: Only for STM32F7, I2C SCL Rising time for the board (default: 25) -- i2c-scl-falling-time-ns : Only for STM32F7, I2C SCL Falling time for the board +- i2c-scl-falling-time-ns: Only for STM32F7, I2C SCL Falling time for the board (default: 10) I2C Timings are derived from these 2 values -- st,syscfg-fmp: Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG +- st,syscfg-fmp: Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG whether Fast Mode Plus speed is selected by slave. - 1st cell : phandle to syscfg - 2nd cell : register offset within SYSCFG - 3rd cell : register bitmask for FMP bit + 1st cell: phandle to syscfg + 2nd cell: register offset within SYSCFG + 3rd cell: register bitmask for FMP bit -Example : +Example: i2c@40005400 { compatible = "st,stm32f4-i2c"; |