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authorGustavo A. R. Silva <gustavoars@kernel.org>2021-02-10 15:23:30 -0600
committerAlex Deucher <alexander.deucher@amd.com>2021-02-18 16:43:09 -0500
commitf2d51b20d747e027e81ab3c3f24a6c833ada3fb3 (patch)
treecd29e85956b22a1142afa0902f046f3193460dcf
parente96b1b2974989c6a25507b527843ede7594efc85 (diff)
drm/amd/display: Fix potential integer overflow
Fix potential integer overflow by casting actual_calculated_clock_100hz to u64, in order to give the compiler complete information about the proper arithmetic to use. Notice that such variable is used in a context that expects an expression of type u64 (64 bits, unsigned) and the following expression is currently being evaluated using 32-bit arithmetic: actual_calculated_clock_100hz * post_divider Fixes: 7a03fdf628af ("drm/amd/display: fix 64bit division issue on 32bit OS") Addresses-Coverity-ID: 1501691 ("Unintentional integer overflow") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
index bc942725b9d8..dec58b3c42e4 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
@@ -240,7 +240,7 @@ static bool calc_fb_divider_checking_tolerance(
pll_settings->calculated_pix_clk_100hz =
actual_calculated_clock_100hz;
pll_settings->vco_freq =
- div_u64(actual_calculated_clock_100hz * post_divider, 10);
+ div_u64((u64)actual_calculated_clock_100hz * post_divider, 10);
return true;
}
return false;