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authorUwe Kleine-König <uwe@kleine-koenig.org>2017-03-20 09:21:11 +0100
committerShawn Guo <shawnguo@kernel.org>2017-04-10 16:16:11 +0800
commitd6f4996e7d69845536f5a8f8eae5caa6245d8976 (patch)
tree089abf4f07096ad36316b354ecec85e9e57a3249
parente87c981cbdcae3c53cb13da022fa48709202fc21 (diff)
ARM: dts: imx25-pinfunc: Move MX25_PAD_TDO__TDO to a more sensible place
The pinfunc definitions are ordered by mux_reg and so automatically by conf_reg, too. PAD_TDO is the only pad that has a conf_reg but no mux_reg. Put it to the place where it its in the order of conf_regs instead of the top. Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm/boot/dts/imx25-pinfunc.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx25-pinfunc.h b/arch/arm/boot/dts/imx25-pinfunc.h
index f987afce2f9d..6c63dca1b9b8 100644
--- a/arch/arm/boot/dts/imx25-pinfunc.h
+++ b/arch/arm/boot/dts/imx25-pinfunc.h
@@ -17,8 +17,6 @@
* <mux_reg conf_reg input_reg mux_mode input_val>
*/
-#define MX25_PAD_TDO__TDO 0x000 0x3e8 0x000 0x00 0x000
-
#define MX25_PAD_A10__A10 0x008 0x000 0x000 0x00 0x000
#define MX25_PAD_A10__GPIO_4_0 0x008 0x000 0x000 0x05 0x000
@@ -541,6 +539,8 @@
#define MX25_PAD_RTCK__OWIRE 0x1ec 0x3e4 0x000 0x01 0x000
#define MX25_PAD_RTCK__GPIO_3_14 0x1ec 0x3e4 0x000 0x05 0x000
+#define MX25_PAD_TDO__TDO 0x000 0x3e8 0x000 0x00 0x000
+
#define MX25_PAD_DE_B__DE_B 0x1f0 0x3ec 0x000 0x00 0x000
#define MX25_PAD_DE_B__GPIO_2_20 0x1f0 0x3ec 0x000 0x05 0x000