diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-10-06 09:34:36 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-11-04 12:29:34 +0000 |
commit | c533e51b228020142cd2c4d5f21e8db4683ce457 (patch) | |
tree | f810d7bae0e655b992aa08cc3e375207a17dab7a | |
parent | c7d059cae31f328bbe2be6ab737226d338f22486 (diff) |
SERIAL: omap: move xon/xoff setting earlier
Take advantage of the switch to mode B for accessing the TCR register,
and move the xon/xoff configuration there. This allows further
simplication of this sequence.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | drivers/tty/serial/omap-serial.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c index 7180ffc847e8..0d2671e66da4 100644 --- a/drivers/tty/serial/omap-serial.c +++ b/drivers/tty/serial/omap-serial.c @@ -898,16 +898,20 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, else serial_out(up, UART_OMAP_MDR1, up->mdr1); - /* Enable access to TCR/TLR */ + /* Configure flow control */ serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); + + /* XON1/XOFF1 accessible mode B, TCRTLR=0, ECB=0 */ + serial_out(up, UART_XON1, termios->c_cc[VSTART]); + serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); + + /* Enable access to TCR/TLR */ serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); - /* Hardware Flow Control Configuration */ - if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { /* Enable AUTORTS and AUTOCTS */ up->efr |= UART_EFR_CTS | UART_EFR_RTS; @@ -925,9 +929,6 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_out(up, UART_EFR, up->efr); - serial_out(up, UART_XON1, termios->c_cc[VSTART]); - serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); - /* clear SW control mode bits */ up->efr &= OMAP_UART_SW_CLR; |