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authorEnrico Weigelt <info@metux.net>2019-07-29 16:39:26 +0200
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2019-07-30 14:14:31 +0300
commit5037d4ddda31c2dbbb018109655f61054b1756dc (patch)
treeeb88c6f30053e0dd26e58546df8bd0ed4cb81658
parent6a0694b6a244bc43ee79b65d0ae5435fb7b74401 (diff)
platform/x86: pcengines-apuv2: wire up simswitch gpio as led
The APU3+ boards have two SIM sockets, while only one of them can be routed to the mpcie slots at a time. Selection is done via simswap gpio. We currently don't have a fitting subsystem for those cases yet, so just wire it up to a LED for the time being. While this isn't really semantically correct, it's a good compromise. Signed-off-by: Enrico Weigelt <info@metux.net> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
-rw-r--r--drivers/platform/x86/pcengines-apuv2.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/platform/x86/pcengines-apuv2.c b/drivers/platform/x86/pcengines-apuv2.c
index 56703656e8e6..48b112b4f0b0 100644
--- a/drivers/platform/x86/pcengines-apuv2.c
+++ b/drivers/platform/x86/pcengines-apuv2.c
@@ -77,7 +77,8 @@ static const struct amd_fch_gpio_pdata board_apu2 = {
static const struct gpio_led apu2_leds[] = {
{ .name = "apu:green:1" },
{ .name = "apu:green:2" },
- { .name = "apu:green:3" }
+ { .name = "apu:green:3" },
+ { .name = "apu:simswap" },
};
static const struct gpio_led_platform_data apu2_leds_pdata = {
@@ -94,6 +95,8 @@ static struct gpiod_lookup_table gpios_led_table = {
NULL, 1, GPIO_ACTIVE_LOW),
GPIO_LOOKUP_IDX(AMD_FCH_GPIO_DRIVER_NAME, APU2_GPIO_LINE_LED3,
NULL, 2, GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP_IDX(AMD_FCH_GPIO_DRIVER_NAME, APU2_GPIO_REG_SIMSWAP,
+ NULL, 3, GPIO_ACTIVE_LOW),
}
};