diff options
| author | Stu Hsieh <stu.hsieh@mediatek.com> | 2018-08-09 10:15:37 +0800 |
|---|---|---|
| committer | CK Hu <ck.hu@mediatek.com> | 2018-08-27 11:24:35 +0800 |
| commit | 48d25d243bfb20a7230e9f226c560b71d989d962 (patch) | |
| tree | 7812862b97810b85e19859b334319fabc29ff363 | |
| parent | 29d32e466e98e03378878e95339334971d0fdaf4 (diff) | |
drm/mediatek: add connection from RDMA0 to DSI1
This patch add connection from RDMA0 to DSI1
Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c index 03e3628b5b0d..310d8482d5a0 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c @@ -107,6 +107,7 @@ #define GAMMA_MOUT_EN_RDMA1 0x1 #define RDMA0_SOUT_DPI0 0x2 #define RDMA0_SOUT_DPI1 0x3 +#define RDMA0_SOUT_DSI1 0x1 #define RDMA0_SOUT_DSI2 0x4 #define RDMA0_SOUT_DSI3 0x5 #define RDMA1_SOUT_DPI0 0x2 @@ -228,6 +229,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur, } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DPI1) { *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; value = RDMA0_SOUT_DPI1; + } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI1) { + *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; + value = RDMA0_SOUT_DSI1; } else if (cur == DDP_COMPONENT_RDMA0 && next == DDP_COMPONENT_DSI2) { *addr = DISP_REG_CONFIG_DISP_RDMA0_SOUT_EN; value = RDMA0_SOUT_DSI2; |