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authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>2013-02-25 15:54:10 -0500
committerH. Peter Anvin <hpa@linux.intel.com>2013-02-25 13:42:37 -0800
commit1256276c98dbcfb009ac8e0687df9a1e291fd149 (patch)
tree44a85b0517106d94e8a82a98146e786117ca83c4
parenta2fd6419174470f5ae6383f5037d0ee21ed9833f (diff)
x86, doc: Fix incorrect comment about 64-bit code segment descriptors
The AMD64 Architecture Programmer's Manual Volume 2, on page 89 mentions: "If the processor is running in 64-bit mode (L=1), the only valid setting of the D bit is 0." This matches with what the code does. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Link: http://lkml.kernel.org/r/1361825650-14031-4-git-send-email-konrad.wilk@oracle.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
-rw-r--r--arch/x86/kernel/head_64.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 980053c4b9cc..37f5304e80f5 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -49,7 +49,7 @@ L3_START_KERNEL = pud_index(__START_KERNEL_map)
startup_64:
/*
- * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1,
+ * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
* and someone has loaded an identity mapped page table
* for us. These identity mapped page tables map all of the
* kernel pages and possibly all of memory.
@@ -146,7 +146,7 @@ ident_complete:
jmp secondary_startup_64
ENTRY(secondary_startup_64)
/*
- * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1,
+ * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
* and someone has loaded a mapped page table.
*
* %esi holds a physical pointer to real_mode_data.